A conventional phase lock loop incorporates a phase and frequency detector (PFD) with a reference signal input coupled to a reference signal source such as a crystal oscillator providing a stable frequency and phase reference signal. A feedback signal input of the PFD is coupled to the output of the PLL circuit for comparison of the feedback signal with the reference signal. The phase and frequency detector generates output "up" and "down" pulse signals according to whether the reference signal or sync signal leads or lags the feedback signal. Typically, the up and down signals at the output of the PFD are used to drive an analog transistor charge pump and RC loop filter circuit. The duration or pulse width of the "up" and "down" pulse signals is proportional to the skew between the reference signal and feedback signal. The analog charge pump circuit in turn controls the switching speed of current starved inverter stages of a voltage controlled ring oscillator. Varying the switching speed in turn varies the frequency of the feedback signal from the PLL to achieve a "lock" condition between the reference signal and feedback signal.
It would be desirable to sense and detect the occurrence of a phase lock condition at the output of the phase and frequency detector PFD and provide a reliable phase lock condition signal to tell another circuit such as a microprocessor whether to start using the clock signal generated by the PLL clock driver circuit. A disadvantage of prior art lock sensor circuits such as the Motorola 88915 (TM) lock signal output circuit is that the lock signal is ambiguous. The lock indication output signal goes high when the PLL is in a steady state phase and frequency lock condition. However under certain conditions the lock output signal may remain low even though the PLL is in the phase lock condition. Therefore the lock output signal is not suitable to tell other active circuits whether to start using the clock generator signal. The lock output signal can only be used for passive monitoring or evaluation.